In a semiconductor integrated circuit (LSI: large scale integrated circuit), elements are electrically separated from each other when a p-n junction formed between a semiconductor substrate and semiconductor elements is inversely biased. However, if the p-n junction is forward-biased, and a current passes through the p-n junction, a parasitic bipolar transistor including the p-n junction operates, and a propagation path of noise is formed, thereby causing the elements to malfunction.
In regard to this, there is a technique of performing a circuit simulation based on a netlist of the LSI and thereby extracting a negative potential node that generates a negative potential level which is lower than ground potential in the netlist. In this technique, whether or not a netlist including a parasitic bipolar transistor meets predetermined signal specifications is determined based on the negative potential node by performing the circuit simulation when the parasitic bipolar transistor is added to the netlist.